A tunnel field-effect transistor (TFET) is a transistor with structure similar to a conventional metal-oxide-semiconductor FET (MOSFET) except that the source and drain terminals of a TFET are of opposite conductivity type. Hence, the common TFET device structure consists of p-i-n (p-type-intrinsic-n-type) junctions, in which the gate electrode controls the electrostatic potential of the intrinsic region. The TFET switching mechanism is by modulating quantum tunneling through a barrier associated with the p-i-n junction instead of modulating thermionic emission over a barrier as in traditional MOSFETs. The TFET is therefor a promising candidate for low energy electronics.
To date, practical TFET implementations have employed SiGe or group III-V (IUPAC groups 13-15) compound semiconductors. Unfortunately, TFETs displaying adequate performance characteristics have required high quality SiGe and/or III-V channel material, and junctions, thus far necessitating high processing temperatures (e.g., in excess of 600° C.). Such high processing temperatures are incompatible with back-end-of-line (BEOL) logic circuitry comprising active devices that are fabricated subsequent to the fabrication of front-end-of-line (FEOL) logic circuitry. Such temperatures are also incompatible with low-temperature substrates (e.g., polymers). As such, much TFET development effort is focused on supplanting conventional MOSFETs employed in frontend logic circuitry. While conventional thin-film transistors (TFT) continue to be the active device of choice for BEOL.